×
Register Here to Apply for Jobs or Post Jobs. X

Lead Digital IC Design & Physical Layout; ASIC​/SOC

Job in Santa Clara, Santa Clara County, California, 95053, USA
Listing for: UST
Full Time position
Listed on 2026-02-16
Job specializations:
  • IT/Tech
    Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 87000 - 131000 USD Yearly USD 87000.00 131000.00 YEAR
Job Description & How to Apply Below
Position: Lead Digital IC Design & Physical Layout (ASIC/SOC)
A technology solutions provider based in California is looking for a Digital Physical Design Engineer. This role requires over 8 years of hands-on experience in ASIC/SOC products and knowledge of industry-standard CAD tools. Responsibilities include SOC design, verification, and static timing analysis. The position offers a compensation range of $87,000 to $131,000, along with comprehensive benefits including medical, dental, vision insurance, and a 401(k) with employer matching.
#J-18808-Ljbffr
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)

Job Posting Language
Employment Category
Education (minimum level)
Filters
Education Level
Experience Level (years)
Posted in last:
Salary