System Architecture Fellow - AI & Data Center Networking

THE ROLE:

The System Architecture Fellow - AI & Data Center Networking is the highest‑impact individual contributor responsible for defining and driving end‑to‑end system architecture for AMD’s next‑generation AI and data center networking platforms. This role focuses on system‑level technical leadership, spanning architecture definition, cross‑domain trade‑offs, and resolution of the most complex hardware challenges across AI‑NICs, DPUs, switches, and rack‑scale networking solutions.

The Fellow operates with enterprise‑scale technical authority, shaping multi‑generation system architectures and influencing execution across ASIC, package, board, optics, power, thermal, mechanical, firmware, and manufacturing domains without direct people management responsibility.

• Define system‑level architecture for AI scale‑out and scale‑up networking platforms, translating product and business requirements into robust, scalable hardware solutions.
• Drive architectural decisions across chip‑to‑system boundaries, including interconnect topology, board and system partitioning, power delivery strategy, signal integrity constraints, and platform extensibility.
• Lead early‑phase system feasibility analysis, identifying risks, trade‑offs, and technology inflection points well ahead of execution.

• Serve as the primary technical authority for system‑level issues spanning ASIC, packaging, board design, optics, power, thermal, and mechanical integration.
• Resolve the most complex bring‑up, validation, and field issues, synthesizing data across domains to drive root‑cause closure and architectural fixes.
• Ensure architectural intent is preserved through implementation, validation, and production ramps.

• Establish and evolve system architecture best practices, review frameworks, and decision‑making methodologies across NTSG.
• Define standardized architecture review and system validation flows to improve predictability, reuse, and quality across programs.
• Champion disciplined system‑level thinking throughout hardware development organizations.

• Influence senior engineers, architects, and managers across organizations through technical depth, clarity, and credibility, not authority.
• Mentor Principal and PMTS‑level engineers on system thinking, architecture trade‑offs, and path‑to‑Fellow technical growth.
• Represent NTSG in cross‑org architecture forums and Fellow‑level technical councils.

• Shape multi‑generation system and platform roadmaps aligned with AMD’s AI networking strategy.
• Anticipate architectural transitions (bandwidth scaling, optics adoption, power density, rack integration) and guide organizations through them with minimal execution risk.

• Deep expertise in system‑level hardware architecture for networking, AI infrastructure, or data center platforms.
• Proven track record of architecting and delivering complex hardware systems across multiple product generations.
• Broad understanding of board design, power delivery, signal integrity, system validation, and bring‑up at high data rates.
• Demonstrated ability to solve ambiguous, cross‑domain problems with significant organizational and business impact.

• Experience with AI scale‑out networking systems, AI‑NICs, DPUs, or high‑bandwidth switching platforms.
• Familiarity with advanced interconnect and packaging technologies and system‑level implications.
• History of enterprise‑level technical influence (e.g., Fellow recognition trajectory, architecture ownership, critical platforms).

• Company‑level influence on architecture, product readiness, and technical direction for AI networking platforms.
• Acts as the system architecture backbone connecting strategy to execution across multiple organizations.
• Defines the technical bar for system architecture excellence within NTSG.
• Recognized industry or academic thought leader; publications and patents a strong plus.

PhD/Master’s in Computer Science, Electrical Engineering, or related technical field.

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