Senior FPGA Architect Precision Timing & Validation

SiTime is seeking an experienced FPGA Architect based in Santa Clara, California, to lead the design and development of FPGA platforms for precision MEMS timing products. The successful candidate will have a minimum of 10 years of experience in FPGA architecture, a strong expertise in Verilog/VHDL, and a deep understanding of timing analysis.

This role includes developing scalable solutions, leading cross-functional teams, and driving system-level requirements.

We offer a competitive salary, quarterly bonuses, and equity grants as part of our comprehensive compensation package.