Senior Customer Technical Enablement and Debug Engineer

Job Details:

Job Description:

The Role and Impact Join Intel’s IPU engineering team and play a critical role as the frontline technical interface with strategic customers. In this position, you will lead system-level debug and issue resolution for Intel’s networking IPU deployments and work directly with customers to diagnose and resolve complex HW/FW/SW issues in real-world environments. This is a highly visible role combining deep technical expertise with customer engagement, where your work directly impacts product success, deployment quality, and customer satisfaction.

• Customer‑Facing Debug & Support:
  Act as the primary technical point of contact for customer‑reported issues; lead real‑time triage, debug, and resolution of complex system issues in customer environments; communicate findings, status, and mitigation plans clearly to customers and stakeholders.
• System‑Level Debug (HW / FW / SW):
  Investigate and debug issues across the full stack: silicon, firmware, drivers, and system software; reproduce field issues in lab environments and drive end‑to‑end root cause analysis; identify failing components (HW/FW/SW) and coordinate resolution across teams.
• Cross‑Functional
  
  Collaboration:
  
  Partner closely with architecture, design, validation, firmware, and software teams; drive escalations, align priorities, and ensure fast issue turnaround; contribute to debug methodologies, tools, and field‑debug capabilities.
• Customer Enablement & Continuous Improvement:
  Support new customer use‑cases and deployment enablement; improve debug workflows, visibility, and in‑field diagnostics; capture and drive closure of systemic issues (escapees).

• Strong problem‑solving and root‑cause analysis capabilities.
• Ability to debug across multiple domains (HW + FW + SW).
• Excellent communication skills with external customers.
• Ability to work under pressure and manage high‑priority escalations.

• Minimum Qualifications
  :
  Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field; 5+ years of experience in system‑level debug (HW/FW/SW); strong experience with networking systems, drivers, and Linux environments; experience debugging complex silicon/system issues in lab or customer environments.
• Preferred Qualifications
  :
  Post Graduate Degree in Electrical Engineering, Computer Engineering, or in a related field; knowledge of IPU / SmartNIC / data center networking architectures; experience with PCIe, RDMA, Ethernet, virtualization, or cloud infrastructure; familiarity with debug tools, logs, and low‑level interfaces (JTAG, trace, dumps); prior experience in customer‑facing engineering roles.

• Job Type: Experienced Hire.
• Shift: Shift 1 (United States of America).
• Primary
  
  Location:
  
  US, California, Santa Clara;
  Additional Locations: US, Oregon, Hillsboro.
• Business group:
  The Central Engineering Group (CEG) is Intel's data‑driven organization that builds scalable engineering solutions across three pillars:
  Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer‑driven, end‑to‑end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
• Position of Trust: N/A.
• Posting Statement:
  All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
• Benefits:
  We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
• Annual Salary Range for jobs which could be performed in the US: $- USD.
• Work Model for this Role:
  This role will be eligible for our hybrid work model which allows employees to split their time between working on‑site at their assigned Intel site and off‑site.
• Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment.