Senior Technical Program Manager – DFX Software Methodology

NVIDIA is now looking for a Senior Technical Program Manager to join our DFX engineering team and lead the software methodology programs that make our chips testable, debuggable, and manufacturable at scale — across infrastructure, implementation, verification, and silicon bring-up! NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services.

Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. NVIDIA is looking for phenomenal people like you to help us accelerate the next wave of artificial intelligence.

We serve as the central program management function for NVIDIA’s VLSI Engineering organization, providing the structure and insight needed to deliver world-class silicon. We align roadmaps across all silicon product lines, enabling technical leads to focus on engineering while we accelerate end-to-end execution! Through the integration of domain-specific workflows and intelligent infrastructure, we deliver automated schedule tracking, resource planning, and program health visibility across the full lifecycle—from Arch/RTL handoff through silicon bring-up and productization.

What you'll be doing:

In this role, you will work closely with DFX software and methodology engineers, development managers, and multi-functional partners to lead methodology programs and process improvements from concept through adoption.

Lead the end-to-end program lifecycle for DFX software methodology across infrastructure, implementation, verification, and bring-up — from requirements and specification through release, adoption, and continuous improvements

Build and lead roadmaps, schedules, and dependencies for DFX flow, tool, and infrastructure releases, aligning methodology drops to chip program milestones through development, tapeout, fab out, and bring-up Drive the release and deployment process for DFX flows and tooling: version planning, regression and quality gates, migration paths, and user adoption across design teams

Collaborate with engineering teams to define requirements and document architecture, interfaces, and workflows; participate in key design reviews and handle scope changes efficiently

Coordinate license, and data infrastructure needs with CAD and IT partners so methodology programs scale with the portfolio

Lead verification and validation planning for methodology — pattern coverage, regression health, and sign-off criteria — and support silicon bring-up by prioritizing lab and field debug tooling needs

Proactively identify technical, resource, and schedule risks; develop mitigations in partnership with engineering, and provide clear status to leadership with recommendations that support tough trade-offs Build metrics and dashboards for methodology health, adoption, and efficiency; capture takeaways, and drive process improvement through automation

What We Need To SeeBS in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience (advanced degree a plus)8+ years of combined experience, built on a software engineering or computer science foundation, including a minimum of 3 years of technical program management experience

Solid understanding of the ASIC/SoC design, verification, and bring-up/productization flow, and a clear understanding of where DFX fits: DFT insertion, scan/ATPG/MBIST, pattern verification, ATE and in-system test, and post-silicon debug

Experience managing software, tooling, or methodology programs — release cycles, quality…