PIC Test Manager

Full-Time | Hybrid | $250K–$260K + Equity + Benefits

We are seeking an experienced PIC Test Manager with deep expertise in wafer-level optical and electrical testing for Photonic Integrated Circuits (PICs).

This role is responsible for leading the wafer-level test strategy across the full product lifecycle—from early silicon bring-up through high-volume manufacturing (HVM). You will oversee test architecture, yield optimization, and manufacturing readiness, partnering closely with design, process integration, foundry, and OSAT teams to successfully scale advanced photonic technologies into production.

• Lead and define wafer-level PIC test strategy across multiple product lines through HVM
• Develop scalable, high-throughput optical and electrical wafer probing solutions
• Drive first-silicon bring-up activities, including defining test content, establishing limits, and conducting characterization
• Accelerate yield learning using parametric data analysis, wafer mapping, and statistical methodologies
• Guide PIC Design-for-Test (DFT) and PDK structure improvements to strengthen manufacturability and test scalability
• Establish and maintain golden wafer / golden die methodologies to support production stability
• Partner with foundries and OSAT providers to qualify wafer-level optical probe infrastructure
• Transfer mature, production-ready test flows into high-volume manufacturing environments
• Act as the primary technical escalation point for yield or manufacturing challenges
• Mentor senior engineers and define best practices for wafer-level test programs

• 10+ years of experience in PIC test engineering, wafer-level probing, or photonics manufacturing test
• Proven ownership of wafer-level optical and electrical test from R&D through HVM
• Strong expertise in:
• Wafer-level optical probing
• Yield learning and spatial data analytics
• Foundry collaboration and factory transfer
• Preferred experience contributing to PIC DFT strategy and working alongside PDK development teams
• Background in high-volume semiconductor or photonics manufacturing settings

• Significant technical ownership with direct influence on manufacturing outcomes
• Opportunity to define how next-generation PICs are tested and scaled for production