More jobs:
Senior Director, -Speed IO & Analog IP Strategy
Job in
Santa Clara, Santa Clara County, California, 95053, USA
Listed on 2026-03-11
Listing for:
Intel
Full Time
position Listed on 2026-03-11
Job specializations:
-
Manufacturing / Production
Systems Engineer
Job Description & How to Apply Below
A leading semiconductor company is seeking a Senior Engineering Leader to oversee its Hard IP and Test Chip Development team. This role involves shaping the future of IO and chiplet interconnect technology, managing high-speed serial IO and die-to-die interfaces across multiple advanced processes. Ideal candidates should have a strong background in analog IP development, leadership experience in silicon teams, and the ability to drive organizational alignment.
This position offers a hybrid work model and competitive compensation.
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Position Requirements
10+ Years
work experience
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