Senior Compiler Engineer

Senior Compiler Engineer

Intel invites experienced professionals to collaborate on GPU compiler technologies, directly influencing next-generation GPU architectures and advancing AI and high-performance computing performance.

• Develop, enhance, test, debug, release, and maintain compiler software for Intel's GPU programming models, including OpenCL, SYCL, OpenMP, and more.
• Design and integrate intermediate representation (IR) interfaces between front‑end components and the Intel Graphics Compiler.
• Create and implement optimization algorithms to maximize code performance and efficiency.
• Collaborate with GPU hardware architects to define new microarchitecture features and instruction set architecture (ISA) for future Intel GPUs.
• Conduct generated code analysis to identify inefficiencies and propose compiler optimizations or hardware enhancements.
• Evaluate workload performance, identify bottlenecks, and refine compilation technology to address advanced use cases.
• Author technical specifications, design documents, and contribute to innovation through patents.

• Bachelor's degree in Computer Science, Computer Engineering, Software Engineering, Electrical Engineering, or a STEM related field.
• 5+ years of experience in C/C++ programming, data structures, and object‑oriented programming principles.
• 2+ years of experience in compiler architecture, compilation phases, and code optimization.
• Experience with development tools (Git Hub, Jira, CMake, etc.).
• Experience with scripting languages (Python or Shell).
• Experience developing software on Linux and Windows environments.

• Post‑graduate degree in a STEM related field.
• Expertise in LLVM/MLIR.
• Knowledge of GPU programming models.
• Experience in compiler optimization and performance tuning.

This role offers the opportunity to work on cutting‑edge compiler technology that directly impacts AI and machine‑learning performance, high-performance computing applications, future GPU architecture development, and industry‑leading optimization techniques.

Competitive pay ranging from $ to $ USD, supplemented with stock bonuses and comprehensive benefit programs—including health, retirement, and vacation.

Hybrid work model allowing employees to balance on‑site time at the Intel site in Santa Clara, CA, with off‑site work.

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance.