Senior Multi‑GPU Signal Processing and System Architecture Engineer

Overview

We are seeking a self‑motivated senior engineer for the Aerial Omniverse Digital Twin team. This hire will own the design and implementation of the real‑time signal‑processing subsystem that converts physics‑based channel descriptions into received signals for large numbers of emulated devices, across systems of potentially thousands of interconnected GPUs!

This position offers the opportunity to work on foundational technology for 5G and 6G network simulation, using NVIDIA's world‑class compute and interconnect platforms!

• Design and implement GPU kernels that apply time‑varying, multi‑antenna channels to OFDM signals under hard real‑time deadlines.
• Architect the inter‑cell data‑flow layer: ensure information each cell needs to model interference from its neighbours is compressed, transported, and consumed within available NVLink and NIC budgets at scale.
• Work with the propagation engine and RAN stack teams to orchestrate the end‑to‑end simulation pipeline, ensuring propagation updates, channel application, and stack execution remain synchronized across hundreds or thousands of GPUs.
• Assess design and implementation trade‑offs between physical fidelity, latency, and system scalability.

• PhD in high‑performance computing, computer architecture, signal processing, or wireless communications (or equivalent experience).
• 12+ years of proven experience.
• Proficiency in CUDA kernel design with attention to memory hierarchy, register pressure, and HBM bandwidth planning, and a track record of writing production‑quality GPU code that meets hard real‑time deadlines.
• Demonstrated ability to build and reason about data flows across multi‑device GPU systems (NVLink, NIC/RDMA) with explicit bandwidth and latency accounting.
• Working knowledge of OFDM signal processing and the 5G  layer, sufficient to implement and validate a channel‑emulation pipeline.
• Impactful publications involving GPU‑accelerated numerical workloads or real‑time system design.

• Experience with GPU‑accelerated RAN platforms, L1/L2 software stacks, or channel emulators.
• Knowledge of high‑bandwidth GPU interconnects (NVLink, NVSwitch) and their scaling properties.
• Familiarity with massive MIMO beam former design and MU‑MIMO precoding.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 200,000 USD - 322,000 USD for Level 5, and 248,000 USD - 396,750 USD for Level 6. You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until July 4, 2026. This posting is for an existing vacancy.

NVIDIA is committed to fostering an inclusive work environment and is an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.