Senior System Architect, Infrastructure Reliability

What you'll be doing:

• Architect Failure Attribution Frameworks:
  Build a scalable flight recorder for EDA jobs that captures high-fidelity state across the CPU, GPU, and Fabric at the moment of failure.
• Build automated diagnostics that correlate GPU XID errors, PCIe bus failures, and CUDA memory exceptions. Connect these errors with system-level events such as OOM kills or NUMA‑related hangs.
• Distributed Logging & Tracing:
  Implement low‑overhead tracing mechanisms (using tracing tools or custom agents) that provide access to job execution across multi‑node Slurm or Kubernetes clusters.
• Root Cause Automation:
  Develop heuristics and models based on machine learning to classify failures as "Hardware Fault," "Software Bug," or "Environment Issue." This reduces the Mean Time to Identify (MTTI) for R&D teams.
• Resiliency Engineering:
  Work closely with hardware and infrastructure teams to define signals of impending failure, enabling proactive job migration or checkpointing before a crash occurs.

• Distributed Systems Mastery: BS, MS, or PhD in Computer Science or Electrical Engineering (or equivalent experience) with 6+ years in systems programming.
• Experience building automated Root Cause Analysis pipelines for HPC or cloud‑scale environments.
• CPU Architecture Deep‑Dive:
  Expert knowledge of x86/ARM node‑level metrics: IPC, cache contention, NUMA imbalance, and hardware interrupts.
• Programming Proficiency:
  Strong C++ and Python skills, with the ability to build high‑performance daemons that monitor system health without impacting workload performance.
• Scale
  
  Experience:
  
  Familiarity with cluster resource managers (Slurm, LSF, or Kubernetes) and how they manage job lifecycle and signal propagation.

• Low‑Level Diagnostics:
  Expert knowledge of the Linux kernel and its error‑reporting interfaces (/dev/mcelog, dmesg, journald). Understand how the kernel handles hardware exceptions and memory faults.
• GPU Infrastructure Proficiency:
  Deep experience with the NVIDIA DCGM and NVIDIA Management Library (NVML) for monitoring device health and capturing state‑dumps.
• Experience with tools doing non‑intrusive monitoring of application health and syscall‑level failure patterns.
• Experience with checkpoint/restore technologies (like CRIU) and their application in long‑running EDA flows.

Salary and Benefits

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is $184,000 – $287,500 for Level 4, and $224,000 – $356,500 for Level 5. You will also be eligible for equity and benefits.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.