Accelerator Compiler and Tool Chain Lead

Accelerator Compiler Lead

We are looking for an Accelerator Compiler Lead to own the compiler and model-lowering stack for Velaura's AI accelerator. This role will lead the path from customer AI models to optimized executable artifacts for our NPU, including graph import, operator lowering, compiler IR, graph transformations, quantization integration, code generation, graph partitioning, and compiler diagnostics. The ideal candidate has built or shipped compiler infrastructure for ML accelerators, GPUs, DSPs, or other heterogeneous compute targets.

Lead architecture and development of the AI accelerator compiler stack.

Own model ingestion and graph lowering from frameworks and exchange formats such as PyTorch export flows, ONNX, Tensor Flow Lite, or similar.

Define operator coverage strategy, lowering rules, graph transformations, fusion, partitioning, and fallback behavior.

Develop compiler optimization passes for tensor layout, tiling, memory movement, mixed precision, operator fusion, and hardware-specific scheduling.

Work closely with accelerator runtime and driver teams to define executable artifact formats, metadata, memory planning requirements, profiling hooks, and runtime constraints.

Partner with hardware architecture and NPU firmware teams on ISA, command streams, tensor layouts, data movement, hardware constraints, and compiler-visible performance features.

Own quantization compiler integration, including calibration metadata, precision selection, scale handling, layout constraints, and accuracy/performance tradeoffs.

Build compiler diagnostics that help customers understand unsupported operators, shape constraints, graph rewrites, quantization issues, and performance bottlenecks.

Establish compiler verification and regression strategy for graph transformations, IR lowering, numerical behavior, model accuracy, and performance.

Hire, mentor, and lead a team of compiler and ML systems engineers.

Deep experience with compiler development, ML graph compilers, or code generation for accelerators, GPUs, DSPs, or heterogeneous compute systems.

Strong understanding of ML model formats, graph IRs, operator lowering, tensor layouts, quantization, and runtime/compiler interfaces.

Strong C++ and Python programming skills and experience building production-quality compiler or systems software.

Experience with compiler frameworks or technologies such as MLIR, LLVM, TVM, XLA, IREE, Glow, TensorRT-like systems, OpenVINO-like systems, or equivalent.

Strong understanding of correctness risks in compiler optimizations, graph rewrites, mixed precision, operator fusion, and hardware-specific lowering.

Ability to work closely with hardware architects, firmware engineers, runtime engineers, model-integration teams, and SQA.

Experience leading technical teams or major architecture areas.

Experience with NPU, GPU, DSP, or AI accelerator compiler stacks.

Experience with quantization-aware compilation, mixed precision, sparsity, pruning, graph partitioning, or hardware-specific scheduling.

Experience supporting ONNX, PyTorch export, Tensor Flow Lite, JAX/XLA, Torch Dynamo/Torch Inductor, or other model import flows.

Familiarity with robotics, computer vision, CNNs, transformers, detection, segmentation, depth, SLAM-adjacent perception, or edge AI workloads.

Experience building customer-facing compiler diagnostics and model-porting tools.

Experience with model-zoo release processes, accuracy validation, and reproducible benchmark artifacts.

Open-source compiler contributions or experience working with external framework communities.

$200,000 - $500,000 a year Compensation & Benefits At Velaura, we believe exceptional talent deserves exceptional rewards. Compensation for this role includes a competitive base salary, performance-based incentives, and equity participation, allowing team members to share in the company's long-term success. Your base pay will depend on your skills, qualifications, experience, and location. In addition to compensation, Velaura offers a comprehensive benefits package that may include medical, dental, and vision coverage;

paid time off; flexible work arrangements; professional development opportunities; and other benefits designed to support the well-being and growth of our team. Velaura is committed to pay equity and transparency and regularly benchmarks compensation to ensure we remain competitive in the market.

Velaura is building next-generation compute technology for cloud, edge, and Physical AI. Our solutions will enable robots, autonomous systems, drones, and other intelligent machines to operate efficiently in the physical world. This is an opportunity to help build foundational technology at a time when the industry is undergoing fundamental change. You will work alongside experienced leaders, architects, engineers, and operators who have delivered industry-defining products across mobile, cloud, semiconductor, and AI platforms.

If you…