Principal Embedded​/HPC Software Engineer R&D

Overview

Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world‑class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.

Our award‑winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry‑first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.

Join a dynamic company at the forefront of innovation! At Keysight, we collaborate with visionary customers to develop breakthrough solutions that connect and safeguard the world. Enjoy a highly competitive package and explore our enriching culture and benefits.

Santa Rosa, CA

Join Keysight's Software and AI Labs to design and implement distributed digital data infrastructures for cutting‑edge Test & Measurement solutions. Your work will enable disruptive capabilities across high‑growth industries, including communications, quantum, semiconductor, and defense.

As an Expert Software Engineer, you will technically lead rapid system prototyping and integration efforts, working with cross‑functional experts within Keysight to bring cutting‑edge Test & Measurement solutions to life across high‑growth industries. This is a high‑visibility role pushing the envelope of what can be achieved with current technology, enabling strategic projects impacting Keysight's continued growth.

• Lead rapid prototyping of large‑scale real‑time heterogeneous processing systems, driving fast iteration from concept to working demonstration.
• Integrate and validate multi‑component platforms combining CPUs, GPUs, Smart
  
  NICs, SoCs, and FPGAs, connected via high‑speed Ethernet (100G/200G/400G) and PCIe fabrics for high‑throughput, low‑latency data streaming and processing.
• Design and validate high‑speed data paths end‑to‑end – from network ingestion and DMA transfers to GPU/CPU processing pipelines – ensuring line‑rate performance and deterministic behavior.
• Serve as the integration point across hardware, firmware, and software layers – ensuring components from multiple teams and vendors work together seamlessly at full data rates.
• Identify and resolve system‑level integration challenges across high‑speed interfaces (Ethernet MACs, PCIe, RDMA/RoCE, DPDK), firmware, and application software.

• BS/MS/PhD in Computer Science, Electrical Engineering, or Computer Engineering.
• 8+ years of experience in system integration and software/firmware development for high‑speed data streaming and real‑time processing systems.
• Proficiency in Modern C++ and embedded programming in Linux, and performance profiling tools.
• Strong expertise in integrating CPUs, GPUs, and FPGAs via PCIe interconnects, including DMA engine configuration, PCIe performance tuning, and understanding of FPGA‑based data path subsystems.
• Strong problem‑solving and debugging skills across hardware‑software boundaries, including signal tracing, interface debugging, throughput analysis, and system‑level root cause analysis.
• Preferred hands‑on expertise with high‑speed Ethernet (100G or higher), including network stack optimization, kernel bypass techniques (DPDK, RDMA/RoCE), and Smart
  
  NIC/DPU integration for line‑rate data acquisition and streaming.
• Proven ability to rapidly prototype and validate complex multi‑component systems under tight timelines.
• Excellent communication and collaboration skills, with the ability to coordinate across hardware, firmware, and software teams.

• Experience with high‑performance real‑time systems, precise clocking and synchronization (PTP/IEEE 1588), and low‑latency DSP pipelines.
• Familiarity with FPGA development flows (System Verilog/VHDL) sufficient to interface with and validate FPGA‑based IP blocks and high‑speed transceivers.
• Familiarity with GPU‑accelerated data…