Advanced Packaging Engineer
Listed on 2026-02-28
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Engineering
Packaging Engineer, Electrical Engineering
Piper Companies is looking for an Advanced Packaging Engineer to join a cutting‑edge startup developing advanced hardware and system technologies that eliminate bottlenecks in large‑scale AI computing. The ideal Advanced Packaging Engineer will lead advanced component and system‑level packaging efforts, with a strong emphasis on module integration and organic substrate technologies on site near San Jose, CA.
Responsibilities for the Advanced Packaging Engineer- Lead packaging development for single‑chip (flip‑chip) and multi‑component module assemblies
- Drive system integration for full module builds (wafer + cold plate + multi‑chip packages)
- Collaborate directly with Taiwan subcontractors and OSAT partners on assembly, manufacturing, yield, and module‑level improvements
- Support substrate technology development and work closely with internal and external teams to refine organic substrate design and production
- 10+ years of experience as an advanced packaging engineer, module integration engineer, or similar role
- Must be eligible to work in the United States and obtain and maintain an Active U.S. Government Secret Clearance
- Strong background in organic substrate technology
- Experience with CoWoS, 2.5D packaging, and system‑on‑wafer programs involving TSMC
- Hands‑on experience working with OSATs and Taiwan subcontractor engagement
- Understanding of multi‑layer substrate concepts and module yield improvement strategies
- Bachelor’s, Master’s, or PhD in Electrical Engineering, Materials Science, Mechanical Engineering, or related field
- Salary/Rate Range: $210,000 - $265,000 plus stock depending on experience
- Comprehensive Benefits:
Medical, Dental, Vision, 401K, PTO, Sick Leave (as required by law), and Holidays
This job opens for applications on 2/20/2026. Applications for this job will be accepted for at least 30 days from the posting date.
‑chip, multi‑chip module, MCM, organic substrate, CoWoS, 2.5D, 3D packaging, TSMC system‑on‑wafer, OSAT, Wistron, module integration, cold plate integration, wafer‑level assembly, substrate technology, semiconductor packaging, high‑density interconnect, HDI substrates, yield improvement, semiconductor manufacturing, module engineering
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