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Program Director, ASIC

Job in Saratoga, Santa Clara County, California, 95071, USA
Listing for: Eridu Corporation
Full Time position
Listed on 2026-03-01
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 225000 USD Yearly USD 225000.00 YEAR
Job Description & How to Apply Below

About Eridu

Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate training and inference for large-scale AI models. Today’s AI performance is frequently limited by system-level bottlenecks. Eridu AI delivers multiple industry-first innovations across semiconductors, software, and systems to unlock greater GPU utilization, reduce capital and power costs, and maximize data center efficiency. The company’s solutions and value proposition have been validated by several leading hyperscalers.

The company is led by a veteran team of Silicon Valley executives and engineers with decades of experience in state-of-the-art semiconductors, optics, software, and systems, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (World’s leading micro-LED company and developer of the first augmented reality contact lens).

Position Overvie

We are seeking a Program Director,ASIC to manage program execution of a networking ASIC program that is central to Eridu’s solution. This is a senior, hands‑on technical program leadership role spanning the full silicon lifecycle—from development through validation and production ramp.

The ideal candidate has deep experience managing large-scale networking or infrastructure SoCs, understands the technical realities of building cutting‑edge chips, and can drive alignment across the various functional areas.

Responsibilities
  • Technical Program Manager with experience in complex ASIC/SOC development of managing various phases of pre‑silicon such as architecture, front‑end design, pre‑silicon verification, FPGA prototyping, Emulation, Physical design, ROM, FW, substrate and package design, Tapeout, and post‑silicon phases such as silicon manufacturing with foundry and OSAT, silicon bring‑up, functional and system validation, embedded FW/SW, ATE, Reliability, Qual, and NPI
  • The role will interface with cross‑functional engineering and program/product management teams to develop ASIC/SOCs solutions that will go into enterprise data centers
  • Collaborate with engineering leaders (ASIC/SOC leads) to create project execution plans for ASIC/SOC development considering all criteria to design products that meet the power/performance and functional specs for all use conditions
  • Work with ASIC, communication system, EE, and software teams to define ASIC bring‑up readiness and test plans
  • Work with the product/program management lead to ensure that ASIC/SOC development meets schedule, cost, and quality requirements
  • Drive engineering project execution, make technical trade‑off recommendations, understand the technical challenges, enable solutions, track and report on status, and resolve blocking issues
  • Collaborate with Architecture, hardware, software, firmware, packaging and PCB teams on ensuring cross‑functional deliverables are identified and tracked
  • Work with external IP, Fabs, OSAT silicon services and partners to complete the execution of projects in time
Qualifications
  • 10+ years of technical product or program management experience
  • 7+ years of experience working directly with engineering teams experience
  • 10+ years of technical program management experience working directly with ASIC engineering teams experience
  • Experience managing programs across cross‑functional teams, building processes, and coordinating release schedules
  • Competent in a variety of project management tools, SOC/IP design methodologies and techniques for all phases of the project lifecycle, and exhibit demonstrated proficiency in core project management disciplines including scope, schedule, budget, resources, quality and risk management, reporting, and metric development/tracking
  • Drive ASIC bring‑up readiness (HW/SW) and ASIC bring‑up plan
  • Experience of working through the various design phases of Silicon development from architecture definition, RTL design, Verification, IP design, Physical design, silicon bring‑up, test, characterization, quality, reliability and post silicon management
Why Join Us?

At Eridu you’ll have the opportunity to shape the future of AI infrastructure, working with a world‑class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI networking solutions, transforming data center capabilities.

The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles.

The pay range for this role is:
225, USD per year(Saratoga, CA)

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