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Digital Design Engineer

Job in Saratoga, Santa Clara County, California, 95071, USA
Listing for: E-Space
Full Time position
Listed on 2026-04-20
Job specializations:
  • Engineering
    Systems Engineer, Electrical Engineering, Electronics Engineer, Aerospace / Aviation / Avionics
Salary/Wage Range or Industry Benchmark: 150000 - 250000 USD Yearly USD 150000.00 250000.00 YEAR
Job Description & How to Apply Below

E-Space is seeking experienced Digital Design Engineers for our Satellite Avionics team. The role involves owning the electrical design of complex digital boards for a next‑generation satellite constellation, including high‑speed interfaces, FPGA integration, and mixed‑signal subsystems. You will play a central role in delivering flight‑qualified avionics hardware from concept through qualification.

Key Responsibilities
  • Own schematic design and component selection for digital avionics boards, from concept through flight qualification.
  • Design high‑speed SERDES interfaces (PCIe, JESD, gigabit links) and DDR4/DDR5 memory interfaces with proper timing closure.
  • Develop clocking architectures including PLL configuration, jitter management, and clock distribution networks.
  • Perform power budgeting and system‑level power allocation across board subsystems.
  • Apply radiation‑tolerant design techniques including SEU/SEE mitigation, TID considerations, and appropriate component derating.
  • Collaborate with FPGA engineers on support circuitry design, pinout planning, and power/layout requirements.
  • Drive board bring‑up activities including configuration, interface verification, and structured debugging.
  • Participate in design reviews and cross‑functional integration with RF, power, thermal, and mechanical teams.
Required Qualifications
  • Own schematic design and component selection for digital avionics boards, from concept through flight qualification.
  • Design high‑speed SERDES interfaces (PCIe, JESD, gigabit links) and DDR4/DDR5 memory interfaces with proper timing closure.
  • Develop clocking architectures including PLL configuration, jitter management, and clock distribution networks.
  • Perform power budgeting and system‑level power allocation across board subsystems.
  • Apply radiation‑tolerant design techniques including SEU/SEE mitigation, TID considerations, and appropriate component derating.
  • Collaborate with FPGA engineers on support circuitry design, pinout planning, and power/layout requirements.
  • Drive board bring‑up activities including configuration, interface verification, and structured debugging.
  • Participate in design reviews and cross‑functional integration with RF, power, thermal, and mechanical teams.
Preferred Qualifications
  • Experience with satellite or spacecraft avionics design and qualification (EM/QM/FM build cycles).
  • Background in non‑volatile memory technologies (Flash, MRAM, FRAM) and in‑system programmability.
  • Exposure to power supply design and power integrity analysis for digital boards.
  • Experience with design for radiation reliability and single‑event effects mitigation at the board level.
  • Familiarity with signal integrity simulation tools (Hyper Lynx SI/PI, Ansys, ADS).
Tools & Technologies
  • Altium Designer (schematic capture and layout review)
  • Hyper Lynx SI, SI/PI, and Full‑Wave (signal and power integrity)
  • SPICE‑based circuit simulation
  • FPGA vendor tool chains (for interface bring‑up and debug)
Compensation & Location

$150,000 - $250,000 a year.

This is a full‑time, exempt position based out of our Saratoga office. The total compensation package will be determined by experience and qualifications.

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