More jobs:
Senior ASIC DV Engineer | Verilog/UVM Satellites
Job in
Saratoga, Santa Clara County, California, 95071, USA
Listed on 2026-05-16
Listing for:
E-Space
Full Time
position Listed on 2026-05-16
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
E-Space is looking for a Digital Design Verification Engineer in Saratoga, CA, to verify custom ASICs used in satellite and wireless telephony. The position requires proficiency in Verilog, System Verilog, and UVM, along with at least 4 years of relevant design verification experience in the semiconductor industry. E-Space offers a competitive salary with a target base pay between $120,000 and $220,000 annually, and benefits including health care options and paid time off.
#J-18808-Ljbffr
Position Requirements
10+ Years
work experience
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
Search for further Jobs Here:
×