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Senior DV Engineer - Satellite & Wireless ASIC Verification
Job in
Saratoga, Santa Clara County, California, 95071, USA
Listed on 2026-06-20
Listing for:
Espace
Full Time
position Listed on 2026-06-20
Job specializations:
-
Engineering
Test Engineer, Electronics Engineer
Job Description & How to Apply Below
Espace is looking for a Digital Design Verification Engineer based in Saratoga, California. The role requires proficiency in Verilog and System Verilog, along with 4+ years of experience in the semiconductor industry. You will be responsible for verifying ASICs in satellite and wireless telephony.
The position offers a competitive salary in the range of $120,000-$220,000 per year and emphasizes continuous learning and wellness options.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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