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FPGA Design Engineer - Avionics

Job in Saratoga, Santa Clara County, California, 95071, USA
Listing for: E-Space
Full Time position
Listed on 2026-07-01
Job specializations:
  • Engineering
    Electronics Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 150000 - 250000 USD Yearly USD 150000.00 250000.00 YEAR
Job Description & How to Apply Below

Ready to make connectivity from space universally accessible, secure and actionable? Then you’ve come to the right place!

E‑Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems.

We’re intentional, we’re unapologetically curious and we’re 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life.

We are looking for FPGA Design Engineers to develop, implement, and verify FPGA firmware for satellite avionics systems. You will work across multiple boards and subsystems, designing RTL for flight computers, payload processing, communications, and sensor interfaces. The role requires strong digital design fundamentals and the ability to deliver reliable, radiation‑tolerant FPGA designs for a space environment.

Key Responsibilities
  • Design and implement RTL in System Verilog or VHDL for satellite avionics FPGAs across a variety of FPGA platforms.
  • Develop AXI Memory‑Mapped and AXI‑Stream protocol implementations for inter‑subsystem communication.
  • Perform FPGA resource and size estimation including logic, memory, and DSP budgeting.
  • Implement clock‑domain‑crossing (CDC) design techniques and verify timing closure across designs.
  • Design clock/reset tree architectures and manage timing‑closure strategies for complex multi‑clock designs.
  • Develop SPI, I²C, GPIO, and other low‑speed peripheral interfaces alongside high‑speed transceiver links.
  • Apply fault‑tolerant digital design techniques including TMR, ECC, scrubbing, and SEE mitigation.
  • Perform synthesis and place‑and‑route using vendor tool chains, including custom placement constraints.
  • Support board bring‑up by developing configuration, interface verification, and debug test sequences.
  • Collaborate with digital design, power, and PCB layout engineers to ensure FPGA support circuitry meets requirements.
Required Qualifications
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • 5+ years of FPGA design experience in aerospace, defense, or high‑reliability systems.
  • Proficiency in System Verilog and/or VHDL for RTL design.
  • Experience with FPGA synthesis, place‑and‑route, and timing closure workflows.
  • Demonstrated knowledge of AXI or similar bus protocols and interface design.
  • Experience with clock‑domain crossing techniques, FIFO design, and multi‑clock architectures.
  • Understanding of radiation effects on FPGAs and mitigation strategies (TMR, ECC, scrubbing).
Preferred Qualifications
  • Experience with a variety of FPGA platforms and vendor tool chains (e.g., flash‑based, SRAM‑based, anti‑fuse architectures).
  • Background in signal processing (FFT, FIR/IIR filters) and DSP integration.
  • Experience with transceiver design and high‑speed serial communications on FPGAs.
  • Exposure to DAC/ADC interfaces and mixed‑signal digital handling.
  • Experience with satellite or spacecraft FPGA applications.
  • Proficiency in Python or TCL scripting for automation and build infrastructure.
Tools & Technologies
  • FPGA vendor tool chains (synthesis, place‑and‑route, timing analysis)
  • RTL simulation tools (e.g., VCS, Questa Sim, or equivalent)
  • Python, TCL, or shell scripting for build automation
  • Makefiles for FPGA build workflows

$150,000 - $250,000 a year

This is a full time, exempt position, based out of our Saratoga office. The total compensation packaged will be determined by various factors such as your relevant job‑related knowledge, skills, and experience.

We are redefining how satellites are designed, manufactured and used—so we’re looking for candidates with passion, deep knowledge and direct experience on LEO satellite component development, design and in‑orbit activities. If that’s your experience – then we’ll be immediately wow‑ed.

E‑Space is not currently able to provide employment sponsorship for candidates who do not hold work authorization for…

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