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Senior RTL Networking ASIC Engineer: QoS & Latency
Job in
Saratoga, Santa Clara County, California, 95071, USA
Listed on 2026-07-10
Listing for:
Eridu Corporation
Full Time
position Listed on 2026-07-10
Job specializations:
-
Engineering
Hardware Engineer, Systems Engineer -
IT/Tech
Hardware Engineer, Systems Engineer
Job Description & How to Apply Below
Eridu Corporation, a Silicon Valley hardware startup, seeks seasoned RTL designers to shape and implement Networking ASICs. You will specify, architect, and productize high‑speed chips for Ethernet/IP interconnects, focusing on latency and QoS.
Join a world‑class engineering team advancing AI data centers and hardware infrastructure. We offer a competitive base salary for SF Bay Area, with a pay range of 210,000–275,000 USD per year, aligned to skills and market trends.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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