Senior ASIC Chip Design Lead — RTL to Tape
Job in
Saratoga, Santa Clara County, California, 95071, USA
Listed on 2026-02-07
Listing for:
Eridu Corporation
Full Time
position Listed on 2026-02-07
Job specializations:
-
IT/Tech
Systems Engineer, Hardware Engineer, Engineering Design & Technologists
Job Description & How to Apply Below
A cutting-edge hardware startup is seeking a hands-on ASIC Chip Design Lead to manage chip design from micro-architecture to integration in a fast-paced environment. The ideal candidate will lead RTL development, ensure timing closure, and drive execution across teams. Strong experience in RTL design and leading tape-outs within the last three years is essential. Join a team shaping the future of AI infrastructure with a competitive salary in Saratoga, CA.
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Position Requirements
10+ Years
work experience
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