Verification Engineer

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today’s innovators stay Ahead of What’s Possible.

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Staff Design Verification Engineer

As a Staff Design Verification Engineer at Analog Devices, you will provide technical leadership in developing verification strategies for our most complex analog and mixed-signal designs. You’ll architect sophisticated verification environments, mentor junior engineers, and collaborate across organizational boundaries to ensure product quality and reliability. Working with limited direction, you’ll apply your deep technical expertise to solve critical verification challenges while representing ADI in interactions with key customers and industry partners.

This senior position involves significant influence on verification methodology adoption and technical decisions that impact crucial organizational objectives.

• Strategic Leadership :
  Architect and lead verification strategy for complex digital and mixed‑signal designs, acting as a key contributor in critical verification environments
• Verification Architecture :
  Design and implement sophisticated UVM‑based verification environments that ensure comprehensive test coverage and design quality
• Technical Mentorship :
  Guide and develop junior engineers, serving as a resource for colleagues with less experience while modeling professional behaviors
• Cross‑Functional Direction :
  Coordinate work across organizational lines, collaborating with design teams on verification requirements and sign‑off criteria
• Problem Resolution :
  Lead complex debugging efforts across RTL and gate‑level simulations with minimal direction, developing resolutions that require in-depth analysis
• Coverage Closure :
  Drive functional and code coverage closure using advanced verification methodologies to ensure design accuracy
• Post‑Silicon Support :
  Lead post‑silicon validation activities, contributing expertise to address critical issues
• Customer Representation :
  Serve as principal customer contact on projects, representing ADI’s technical excellence and customer commitment

• System Verilog and UVM Expertise :
  Expert‑level knowledge of System Verilog and Universal Verification Methodology for architecting advanced verification environments for complex designs
• Test Planning and Strategy :
  Demonstrated ability to develop comprehensive verification plans that drive coverage‑driven methodologies and verification closure
• Mixed‑Signal Verification :
  Deep understanding of mixed‑signal design principles and verification methodologies, with experience implementing sophisticated verification approaches
• Debugging Mastery :
  Advanced debugging skills across multiple design abstractions, with proven ability to resolve complex verification issues with minimal direction
• EDA Tool Proficiency :
  Extensive experience with electronic design automation tools (Cadence/Synopsys) and formal verification techniques
• Scripting and Automation :
  Advanced proficiency in Python, Perl, TCL, or Shell scripting for creating sophisticated verification automation frameworks
• Technical Leadership :
  Demonstrated ability to influence verification direction, mentor junior engineers, and drive methodology adoption across teams

• MS/PhD in Electrical Engineering, Computer Engineering, or related field
• 7‑10+ years of relevant digital design verification experience, with particular emphasis on mixed‑signal verification

At Analog Devices, you’ll be part of a collaborative and innovative team that’s shaping the future of technology. We offer a supportive environment focused on professional growth, competitive compensation and benefits,…