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SOC Engineering, Sr Engineer in District

Job in Seattle, King County, Washington, 98127, USA
Listing for: Synopsys, Inc.
Full Time position
Listed on 2026-02-21
Job specializations:
  • Engineering
    Systems Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 80000 - 100000 USD Yearly USD 80000.00 100000.00 YEAR
Job Description & How to Apply Below
Position: SOC Engineering, Sr Engineer in District 7

Alternate Job Titles:

  • SOC Sr Engineer
  • Senior SOC Design Engineer
  • ASIC/SOC Senior Engineer
We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an experienced SOC engineer with 3–8 years in ASIC/SOC design, passionate about technology and delivering high-quality solutions. You thrive in collaborative settings, communicate clearly with customers, and enjoy tackling technical challenges. Your expertise in synthesis, timing closure, and scripting languages makes you a valuable contributor, and you’re eager to grow and innovate with a leading tech company.

What You’ll Be Doing:
  • Implementing SOC/ASIC designs using Synopsys EDA tools
  • Running Synthesis, LEC, LDRC, GCA, STA, and PTPX flows
  • Solving customer design challenges as part of a project team
  • Developing and deploying system design solutions
  • Collaborating with internal teams and customers
  • Automating tasks using scripting languages
The Impact

You Will Have:
  • Delivering robust SOC/ASIC solutions for customers
  • Accelerating adoption of Synopsys tools and IP
  • Driving innovation on advanced technology nodes
  • Strengthening Synopsys’ reputation as a trusted advisor
  • Influencing best practices in chip design
  • Supporting business growth through collaboration
What You’ll Need:
  • 3–8 years’ experience in ASIC/SOC design
  • Strong skills with Synopsys tools (Synthesis, LEC, STA, etc.)
  • Knowledge of RTL, DFT, and scripting (TCL, Perl, Python)
  • Experience with advanced nodes (
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