Senior FPGA Design & Verification Engineer – Terwave

Application close date:

Applications will be accepted on an ongoing basis until the requisition is closed.

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We're working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!

Blue Origin is seeking a Senior FPGA Design and Verification Engineer to develop the digital signal processing and physical layer implementation for the Terawave next generation modem. In this role, you will architect, design, implement, and verify FPGA-based modem and physical layer solutions that enable robust, high-reliability communications for our spacecraft and ground systems.

Using latest generation hardware and modern design methodologies, you will work across the full development lifecycle—from architecture and algorithm mapping through implementation, verification, and hardware bring‑up—collaborating closely with systems, DSP/communications, RF, and avionics engineering teams.

• Architect and design FPGA implementations of modem and physical layer functions on a SoC FPGA platform.
• Translate communications system and DSP algorithm requirements into efficient, resource‑optimized RTL (VHDL/Verilog/System Verilog).
• Develop and execute comprehensive verification strategies, including self‑checking test benches, constrained‑random verification, and coverage‑driven methodologies (e.g., UVM).
• Perform timing closure, resource optimization, and design implementation for high‑performance FPGA and system‑on‑chip (SoC) platforms.
• Support integration and hardware bring‑up, including lab testing, debug, and validation against system‑level performance requirements.
• Collaborate with DSP/communications engineers to co‑design and optimize physical layer algorithms for fixed‑point FPGA implementation.
• Contribute to design reviews, documentation, and design‑for‑test/design‑for‑reliability practices consistent with aerospace‑grade development.
• Support radiation‑tolerant and high‑reliability design considerations for space‑based applications.

• Bachelor's degree or above in Electrical Engineering, Computer Engineering, or equivalent.
• 7+ years of experience in FPGA design and verification.
• Strong proficiency in RTL design using VHDL and/or Verilog/System Verilog.
• Experience implementing DSP or communications/modem functions in FPGAs (e.g., modulation/demodulation, FEC, filtering, digital front‑ends).
• Proficiency with FPGA development tool chains (e.g., Xilinx/AMD or Intel/Altera) and simulation tools.
• Experience with verification methodologies including self‑checking test benches and functional coverage.
• Strong understanding of timing analysis, constraints, and timing closure.

• Background in digital communications theory and physical layer design (synchronization, equalization, carrier/timing recovery, link budgets).
• Experience with system‑on‑chip (SoC) platforms integrating FPGA fabric and embedded processors.
• Experience in embedded development in C/C++, or experience writing low‑level drivers.
• Experience developing test venue software and hardware infrastructure for hardware‑in‑the‑loop (HIL) testing environment.

Base Pay Range for: CA applicants is $ - $ WA applicants is $ - $. Other site ranges may differ.

• Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long‑term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
• Stock Options for all regular employees (working at least 20 hours/week).
• Paid Time Off:
  Up to four weeks per year based on weekly scheduled hours, and up to 14 company‑paid holidays.
• Dependent on role type and job level, employees may be eligible for benefits and bonuses based on the company's intent to reward individual contributions and enable them to share in the company's results, or other factors at the company's sole discretion. Bonus amounts and eligibility are not guaranteed and subject to change and cancellation. Please check…