Senior ASIC Design Verification Engineer - Terawave
Listed on 2026-08-31
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Engineering
Test Engineer
ASIC Verification Engineer
At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We're working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!
Blue Origin is pioneering the future of space-based communications with Tera Wave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.
The ASIC Verification Engineer leads verification of complex digital subsystems for next-generation Satellite communication ASICs. This role requires strong expertise in advanced verification methodologies, architecture understanding, and multi-functional collaboration to ensure robust, high-quality silicon.
Responsibilities:- Lead verification planning and execution for complex blocks or subsystems.
- Develop sophisticated UVM environments, reference models, scoreboards, protocol monitors, and assertions.
- Translate architecture and design specifications into comprehensive verification strategies and measurable coverage goals.
- Drive functional coverage closure, regression health, and verification signoff readiness.
- Identify verification gaps, corner cases, and high-risk scenarios early in the development cycle.
- Collaborate closely with design, systems, DFT, firmware, and physical design teams.
- Review testbench architecture, stimulus quality, and debug methodologies for technical excellence.
- Mentor junior engineers in verification standard processes.
- Support bring-up, emulation, prototyping, and post-silicon debug activities as needed.
- BS or MS in Electrical Engineering, Computer Engineering, or related field.
- 8+ years of ASIC/SoC verification experience.
- Deep hands-on expertise in System Verilog and UVM.
- Strong understanding of verification planning, assertions, and coverage closure.
- Experience verifying complex digital control and datapath logic.
- Proven debugging capability across RTL, testbench, and system interactions.
- Ability to work effectively across multidisciplinary engineering teams.
- Background in Space based communications, wireless communications, or modem/baseband hardware.
- Experience verifying LDPC/BCH/FEC blocks, framing engines, beamforming logic, or DSP pipelines.
- Familiarity with formal verification tools and methodologies.
- Experience with low-power verification, CDC/RDC verification, or reset-domain behavior.
- Knowledge of high-speed interface verification and hardware/software interactions.
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