Principal Technical Engineer, 3rd Party IP Engineer

• work in parallel with a team of 3rd party IP engineers responsible for bringing in all subcontracted IP under the Marvell IP umbrella
• involved in all stages of SoC development including defining core requirements, validating IP developer competence, overseeing core development, technology compliance, core integration, test compliance and silicon validation
• assist sales in winning bids by working with leading edge IP providers to meet customer requirements
• manage 3rd party developers in completing core designs and providing required design rules
• advise the Marvell design center on core integration into custom silicon designs and hold joint reviews with the design center and 3rd party IP provider
• post-silicon validation at customer sites will require a limited degree of travel
• developing statements of work, leading provider progress reviews, using 3rd party developer problem reporting tools to drive to problem resolution
• assist with 8D follow-through for significant supplier issues

• Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience or equivalent professional experience in lieu of a formal degree
• Proficient in understanding of DDR type interfaces (DDR, LPDDR, GDDR, HBM, eMMC), including the challenges associated with SoC PHY integration, timing analysis, packaging, and multi-chip integrated packaging
• Proficient in project management tasks required to manage 3rd party developers
• Broad-based exposure to ASIC design flows required for releasing a chip to fabrication including logic synthesis, physical design, timing, DRC/LVS, Formal verification and electrical checking
• Good understanding of Design-for-Test concepts including DFT logic insertion, test generation, scan and embedded core testing
• Good communication and customer management skills.

Demonstrates expertise in SoC development, including core requirements definition, IP integration, and silicon validation. Proficient in managing 3rd party developers and ensuring compliance with design rules and project management tasks.

• SoC Development
• DDR Type Interfaces
• ASIC Design Flows
• Project Management
• Design-for-Test Concepts

• SoC Development
• DDR Type Interfaces
• ASIC Design Flows
• Logic Synthesis
• Physical Design
• Timing Analysis
• DRC/LVS
• Formal Verification
• Electrical Checking
• Design-for-Test

• Communication Skills
• Customer Management

• IP Integration
• Silicon Validation
• Core Development
• Technology Compliance
• Multi-Chip Integrated Packaging

• 3rd Party Developer Problem Reporting Tools