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Senior Analog IC Design & Verification Engineer
Job in
South San Francisco, San Mateo County, California, 94083, USA
Listed on 2026-08-22
Listing for:
Neuralink
Full Time
position Listed on 2026-08-22
Job specializations:
-
Engineering
Electronics Engineer, Systems Engineer
Job Description & How to Apply Below
Neuralink seeks an experienced analog/mixed-signal IC engineer to design and verify CMOS circuits for high-speed brain-machine interface SoCs. Responsibilities include circuit design, layout oversight, and analog verification with a focus on noise, distortion, and power trade-offs.
The role requires a BS with 5+ years in related fields; MS/PhD is a plus. Employment offers equity (RSUs) and full-time compensation in a cutting-edge team.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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