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SoC Verification Engineer: High-Impact ASIC DSP
Job in
South San Francisco, San Mateo County, California, 94083, USA
Listed on 2026-08-22
Listing for:
Socket.dev
Full Time
position Listed on 2026-08-22
Job specializations:
-
Engineering
Test Engineer, Hardware Engineer, Electronics Engineer
Job Description & How to Apply Below
Neuralink is seeking ASIC Design Verification Engineers to join the SoC Implant Team. You will work on high-throughput, low-power DSP verification for brain-computer interface tech. The role emphasizes System Verilog proficiency, test bench development, and automation scripting in a collaborative environment.
We offer equity (RSUs) and a comprehensive benefits package for full-time staff, with a base salary range of $131,000 to $243,000 depending on experience and education.
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