Automotive Software Architect

1. Hardware Architecture & Microcontrollers

• Silicon Selection: Expert familiarity with automotive-grade microcontrollers and SoCs designed for graphics and functional safety (e.g., Renesas RH850/D1x, Infineon Traveo II, NXP S32K3, or STMicroelectronics Stellar).
• Peripherals & Display Driving: Low-level configuration of Serial Peripheral Interface (SPI) for communication, pulse-width modulation (PWM) for LED dimming, hardware-driven stepper motors for analog needles, and display interfaces like LVDS, RSDS, or MIPI DSI.
• Power Management: Knowledge of automotive power states (Active, Sleep, Deep Sleep) and meeting strict quiescent current constraints (typically < 100µA) during vehicle ignition-off states.

• In-Vehicle Networks: Implementation of CAN / CAN-FD for standard vehicle bus data, LIN for low-cost switch panels, and Automotive Ethernet (100
  
  BASE-T1) for high-bandwidth data transfers like map streaming.
• Diagnostics: High-level mastery of UDS (Unified Diagnostic Services – ISO 14229) for reading fault codes (DTCs), flashing firmware via custom bootloaders, and managing Routine Controls.
• Network Management: Deep understanding of OSEK/AUTOSAR Network Management (NM) to control cluster sleep/wake synchronization across the vehicle network.

• AUTOSAR (Classic & Adaptive): Developing Software Components (SWCs), configuring the Runtime Environment (RTE), and managing the Complex Device Drivers (CDD) layer for display controllers.
• RTOS (Real-Time Operating Systems): Configuring and task-scheduling on safety-certified RTOS kernels like Vector MICROSAR OS, Green Hills INTEGRITY, or Black Berry QNX
• Inter-Process Communication (IPC). Designing low-latency, secure data pipes (such as shared memory or message queues) to transport vehicle data seamlessly between the real-time safety domain and the rich graphics domain.

• HMI Pipelines: Translating dynamic vehicle signals (like RPM, speed, and active safety alerts) into visual components using embedded HMI tools such as Kanzi UI, Qt for Automotive, or CGI Studio etc is plus
• GPU Optimization: Optimizing 2D/3D visual rendering, managing texture memory (VRAM), and ensuring a consistent frame rate (typically 60 FPS) without causing thermal throttling on the ECU.

• ASIL Decomposition: Because the cluster handles critical "telltales" (e.g., airbag warnings, brake failures, speedometers), the rendering of these elements must meet ASIL B or higher safety standards.
• Safety Mechanisms: Implementing hardware watchdogs, RAM/ROM bist-tests, and "Safety Layers" in graphics (e.g., pixel monitoring or signature checks to verify warning icons are actively drawn on screen).
• Cybersecurity (ISO 21434): Implementing secure boot sequence processing, hardware security modules (HSM), and encrypted CAN communication (SecOC) to prevent unauthorized odometer tampering or display hijacking.

• HIL (Hardware-in-the-Loop): Simulating the entire vehicle infrastructure to validate cluster behaviors using environments like Vector VT System, dSPACE, National Instruments etc.
• Tooling Proficiency: Advanced utilization of network analysis equipment such as Vector CANalyzer / CANoe, Lauterbach TRACE
  32 debuggers, and digital oscilloscopes for physical layer signal verification.

We are looking for a hands‑on Software Architect / Senior Software Engineer to lead the technical direction and deliver high‑quality embedded software for an Automotive Instrument Panel Cluster (IPC) ECU. This role will drive architecture decisions, improve platform stability and software quality, and actively contribute to design, implementation, integration, and issue resolution across the full product lifecycle.

• Own and evolve the software architecture for the IPC ECU platform, including module boundaries, interfaces, and integration strategy.
• Design, develop, and maintain production embedded software in C (and supporting tools/scripts in Python as needed).
• Lead technical decision-making for new features, defect fixes,…