Associate FPGA Engineer

Position Summary

Airbus U.S. is looking for an enthusiastic and creative FPGA engineer to develop digital logic solutions for our custom hardware on satellites. We are looking for candidates who can bring exceptional skills to accelerate our small‑satellite avionics development program.

The Associate Engineer's primary responsibility will be contributing to FPGA design and development for Airbus U.S.'s next-generation of small-satellite avionics. The Associate Engineer will be heavily involved in the process of FPGA design, initial board bring‑up, debugging, testing, requirements verification, and design revisioning across the hardware development life cycle, from prototyping to production. The Associate Engineer will report to the program's Lead Principal Engineer.

• Utilize design and quality requirements, electrical schematics, and parts datasheets to develop and document FPGA solutions for control and dataflow applications in small satellite avionics.
• Develop and verify VHDL RTL and top‑level block diagram solutions for FPGA SoCs.
• Create FPGA device constraints, perform logic synthesis, execute place and route, and generate FPGA device images in the Vivado and Libero design environments.
• Perform static timing analysis and achieve timing closure, generate and verify compilation reports, and disposition compilation warnings.
• Document the design, software interfaces, and compilation results.

• Support laboratory‑based testing, troubleshooting, and performance characterizations of FPGA designs on development kits and custom hardware solutions.
• Develop test scripts and software for embedded Linux and bare‑metal platforms to validate hardware function and performance during board bring‑up, debugging, and testing.

• Support hardware architecture development, including reviewing selected FPGA devices for fitness to their intended applications and estimating resource utilization and power dissipation.
• Provide an FPGA‑based review of electrical schematics and PCB designs, including pin assignments, clock generation, reset distribution, and high‑speed interfaces to memories and transceivers.
• Support make‑vs‑buy trade studies for licensing third‑party IP cores.
• Support board‑level and unit‑level design reviews.
• Support systems engineering and cross‑disciplinary development efforts.

• Bachelor's degree in STEM (Science, Technical, Engineering, Math) or related areas.

• Industry experience with FPGAs is considered a plus.
• Academic and/or internship experience with FPGAs may be considered in lieu of industry work experience.

• Familiarity in coding structural and behavioral architectures in hardware description languages such as VHDL, Verilog, or System Verilog.
• Familiarity with FPGA design tools from AMD Xilinx Vivado and Microchip Libero, including SoC block diagram integration and third‑party IP utilization.
• Familiarity in the use of Git for source code revision control.
• Familiarity with programming for hardware verification and validation, including C, C++, and Python.
• High proficiency in oral and written technical communication.

• Position requires on‑site work on an as‑needed basis in the program's electronics development laboratory located in University Park, Pennsylvania.
• Occasional travel to the facilities of Airbus U.S. Space & Defense and the facilities of its subcontractors will also be required.

• US Citizenship is required.

• Ability to obtain and maintain a U.S. Government security clearance.
• Active U.S. DoD security clearance at Secret or above highly desirable.

• Vision: able to see and read computer screen and other electronic equipment with screens, able to read documents.
• Hearing: able to hear to participate in conversations in person and via teleconference or phone and to hear sounds including safety warnings or alarms.
• Equipment Operation: able to operate most office and personal electronic equipment.
• Carrying: able to carry documents, electronic equipment and/or supplies…