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Senior Electrical Engineer-FPGA Verification

Job in Sudbury, Middlesex County, Massachusetts, 01776, USA
Listing for: Prattwhitney
Full Time position
Listed on 2026-05-31
Job specializations:
  • Engineering
    Systems Engineer, Software Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 86800 - 165200 USD Yearly USD 86800.00 165200.00 YEAR
Job Description & How to Apply Below

Senior Electrical Engineer – FPGA Verification

We are seeking an experienced Senior Electrical Engineer to verify FPGA-based designs for radar applications. This role is based in Tewksbury, MA or Marlborough, MA and requires a U.S. citizen with an active DoD Secret clearance.

Responsibilities
  • Own or contribute to the successful completion of FPGA-based designs on time and on budget.
  • Verify designs utilizing self-checking techniques with directed and constrained random tests.
  • Track functional and code coverage using UVM.
  • Create complete documentation including verification plan and reports.
  • Demonstrate self‑motivation with little supervision required.
  • Work cooperatively with systems, hardware, software engineers, and program management to ensure product success.
  • Support internal and external technical reviews.
Essential Qualifications
  • Minimum 5 years of relevant experience in digital design verification.
  • Proficient in System Verilog for verification.
  • Hands‑on experience verifying designs using UVM‑based test benches.
  • Proficiency with industry‑standard simulators (e.g., Questa, VCS, Xcelium).
  • Experience with version control systems (Git, Clear Case, SVN) and collaborative workflows.
  • Strong understanding of constrained‑random verification and functional coverage methodology.
  • Experience with regression management and debugging of complex intermittent failures.
  • Familiarity with AXI, PCIe, Ethernet, DDR protocols.
Preferred Qualifications
  • Experience designing FPGAs using VHDL/Verilog.
  • Experience with UVMF (UVM Framework) for structured, reusable testbench development.
  • Familiarity with Vivado and Quartus FPGA simulation flows.
  • Experience with scripting languages (Python, Tcl, Perl) for test automation and tooling.
  • Experience with SLURM workload manager for job scheduling and compute cluster resource management.
  • Prior experience mentoring junior verification engineers.
  • Existing DoD security clearance.
Security Clearance

Requires an active DoD Secret clearance. U.S. citizenship is required for eligibility. Security clearance must be obtained and maintained by day one.

Salary & Benefits

Salary range: $86,800 - $165,200 USD. The position includes relocation assistance if eligible.

Benefits include medical, dental, vision, life insurance, short‑term and long‑term disability, 401(k) match, flexible spending accounts, flexible work schedules, employee assistance program, parental leave, paid time off, and holidays, subject to business unit terms.

Equal Opportunity Employer

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, veteran status, or any other protected class.

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Position Requirements
10+ Years work experience
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