FPGA Design/Verification Engineer
Listed on 2026-02-16
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Engineering
Electronics Engineer, Systems Engineer, Test Engineer, Engineering Design & Technologists
Overview
Location: Sunnyvale, CA
Salary: $90.00 USD Hourly – $100.00 USD Hourly
Description:
Job Title: FPGA Design/Verification Engineer
Duration: 6 Months (Possible Extension)
Location: Sunnyvale, CA;
Possible onsite Denver, CO
The selected candidate will be responsible for ASIC & FPGA verification on R&D program. This engineer will be a verification UVM expert.
Experience required:
- Verifying FPGA and/or ASIC designs including creating UVM verification environments, test benches, tests and coverage.
- Developing and finding more affordable ways to automate and develop verification scripts to improve FPGA verification efforts.
Collaboration: Cross discipline collaboration with RTL Designers, Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts.
Leadership: The selected candidate will also provide support and technical direction to junior engineers.
Overall contribution: to simulation, verification, integration & test of complex, high speed products.
ContactThis job and many more are available through The Judge Group. Please apply with us today!
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