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TPU ASIC Verification Engineer

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Google Inc.
Full Time position
Listed on 2026-02-16
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, Engineering Design & Technologists, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 113000 - 161000 USD Yearly USD 113000.00 161000.00 YEAR
Job Description & How to Apply Below
A leading tech company is seeking an ASIC Design Verification Engineer to shape the future of AI/ML hardware acceleration. In this role, you will drive cutting-edge TPU technology that powers demanding AI/ML applications. Responsibilities include planning verification, creating test environments using System Verilog, and collaborating closely with design engineers. Applicants should possess a Bachelor's degree in a relevant field and experience with design verification.

The base salary range is $113,000 to $161,000 plus bonuses and benefits.
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