CCU SoC RTL Design Engineer TPUs
Job in
Sunnyvale, Santa Clara County, California, 94087, USA
Listed on 2026-02-28
Listing for:
Google Inc.
Full Time
position Listed on 2026-02-28
Job specializations:
-
Engineering
Systems Engineer, Electrical Engineering, Engineering Design & Technologists
Job Description & How to Apply Below
A leading technology company is seeking a Clock Control Unit Design Engineer to shape the future of AI/ML hardware acceleration. In this role, you will design complex clocking infrastructures and optimize power management for next-generation Tensor Processing Units. Ideal candidates will have a Bachelor's in Electrical Engineering, 2+ years of ASIC RTL design experience, and proficiency in System Verilog. This position includes a competitive salary, bonus, and equity options.
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