R&D Engineering, Sr

You Are:

You are a passionate and experienced R&D professional, eager to push the boundaries of hardware verification. You bring a deep understanding of hardware partitioning, emulation, and verification flows, and you’re motivated by the challenge of solving complex technical problems that have a real impact on the semiconductor industry. You approach your work with intellectual curiosity and a drive for excellence, always seeking innovative solutions and continuous improvement.

Your expertise in hardware design, logic synthesis, and system-level partitioning is complemented by your ability to mentor and collaborate with cross‑functional teams. Above all, you are dedicated to advancing technology that powers the next generation of intelligent systems.

• Designing, developing, and optimizing hardware partitioning algorithms for large‑scale, hardware‑assisted verification platforms.
• Collaborating with emulation and verification teams to define and implement partitioning methodologies that improve system performance and scalability.
• Analyzing complex RTL designs to identify optimal partitioning strategies and address bottlenecks in hardware‑software co‑verification.
• Driving the integration of partitioning solutions into Synopsys’ hardware verification tools and flows.
• Mentoring junior engineers and providing technical leadership in architecture and implementation discussions.
• Staying abreast of industry trends and advancing partitioning technology through innovation and research.
• Engaging with customers to understand their verification challenges and incorporating feedback into product enhancements.

• Accelerate verification cycles for the world’s most advanced semiconductor designs through innovative partitioning techniques.
• Enable customers to achieve higher emulation performance and scalability, reducing time‑to‑market for cutting‑edge products.
• Influence the architectural direction of Synopsys’ hardware‑assisted verification solutions.
• Drive adoption of next‑generation verification methodologies across the semiconductor industry.
• Enhance the quality and reliability of complex SoC designs by improving verification coverage and debugging efficiency.
• Serve as a technical thought leader and mentor within the hardware verification community at Synopsys.
• Build collaborative relationships with cross‑functional teams, customers, and industry partners.

• Master’s or advanced degree in Electrical Engineering, Computer Engineering, or a related discipline.
• 6+ years of hands‑on experience in hardware partitioning, emulation, or hardware‑assisted verification.
• Strong proficiency in RTL design (Verilog, System Verilog, or VHDL) and logic synthesis flows.
• Deep understanding of partitioning algorithms, resource allocation, and hardware/software co‑verification challenges.
• Experience with emulation platforms (e.g., HAPS, ZeBu, Palladium, Veloce) and related EDA tools.
• Proven track record of developing and deploying scalable verification solutions in a production environment.

• Analytical thinker with a passion for solving complex technical challenges.
• Effective communicator, able to present ideas clearly to both technical and non‑technical audiences.
• Collaborative team player who thrives in a diverse, multidisciplinary environment.
• Innovative and proactive, with a commitment to continuous learning and improvement.
• Detail‑oriented and highly organized, with strong project management skills.

You’ll join the Hardware Assisted Verification team, a group of passionate engineers dedicated to advancing emulation, prototyping, and partitioning technologies. Our team values innovation, collaboration, and technical excellence, and works closely with other R&D groups, product management, and customers to deliver world‑class solutions that address the most demanding verification challenges in the semiconductor industry.

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self‑driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high‑performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.