Integrated Circuit Design Engineer

Client owns the major market for VR devices.

ASIC Power Engineer to perform power analysis and optimizations in ASIC for Client’s AR/VR products. Areas of interest include Machine Learning.

• Perform PPA optimization with Fusion Compiler.
• Perform RTL and netlist-level power analysis.
• Perform post-processing and scripting on report log files for format conversion, data analysis, and information extraction.
• Set up, run, debug, and analyze reports of ASIC flows (Synthesis, PD, Power, Timing).
• Implement some blocks at RTL and UPF.
• Ability to document and communicate clearly.

• BS in Electrical Engineering/Computer Science or equivalent experience.

• Experience with Synopsys (DC, ICC, PTPX/Prime Power, VCS, Verdi) and/or Cadence (Joules).
• Should know how to use Python, Perl (or similar) scripting and data post-processing tools.
• Experience in low-power design, tools, and methodologies, including power intent UPF specifications.
• Silicon power characterization.

• Some power profiling experience at IP/SoC level.
• Experience with silicon power characterization.
• Experience with data analytics and visualization.
• For information on benefits, equal opportunity employment, and location-specific applicant notices,

At SPECTRAFORCE, we are committed to maintaining a workplace that ensures fair compensation and wage transparency in adherence with all applicable state and local laws. This position's starting pay is: $90.00/hr.