FPGA Prototyping Design Engineer

Come join Apple's growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development. With a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.

If you enjoy a fast-paced and challenging environment, collaborating with people across different functional areas, and thriving during crisis times, we encourage you to apply.

As an FPGA Prototyping Design Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators, as well as multiple ARM-based sub-systems. You will integrate industry standard and custom hardware IP into SoCs. You will work closely with SoC architects, IP developers to develop SoCs that meets the power, performance and area goals for Apple devices. You will help define the processes, methods and tools for design and implementation of large complex SoCs.

You will develop and maintain methodology and flows checks for your design. Interact with our verification team to ensure appropriate validation and coverage goals are met. You'll ensure security assumptions for the chip are accurately implemented within the block/s. Collaboration with multi-disciplinary groups to make sure designs are delivered on time and with the highest quality by incorporating accurate checks at every stage of the design process.

Proven experience with bring up, debugging and verification on Xilinx FPGA. Good understanding on I2C/SPI/UART. Experience debugging with ILA. Experience in designing using Vivado IP integrator.

Experience with high-speed SERDES or PCIe. Experience in FPGA development for wireless applications. Understanding of wireless standards, such as IEEE 802.11, Bluetooth.

Experience with single or multi-FPGA platforms (Synopsys HAPS experience). Experience writing 'make' based build system. Programming skill in Python, Tcl with AI assisted coding experience.

Experience with Git/Perforce/Team City. FW development/debugging experience with ARM processor is a plus.

Bachelors degree in EE,CE, or related field. Design/verification using Verilog/System Verilog. Good understanding on CDC and FPGA timing constraint. Exposure to Linux environment.