×
Register Here to Apply for Jobs or Post Jobs. X

TPU SoC Design Engineer, Cloud

Job in Sunnyvale, Santa Clara County, California, 94086, USA
Listing for: Google
Full Time position
Listed on 2026-06-03
Job specializations:
  • Engineering
    Systems Engineer, AI Engineer (Applied/Software), Hardware Engineer, Software Engineer
Salary/Wage Range or Industry Benchmark: 138000 - 198000 USD Yearly USD 138000.00 198000.00 YEAR
Job Description & How to Apply Below
TPU SoC Design Engineer, Cloud

_corporate_fare_ Google _place_ Sunnyvale, CA, USA

** Mid*
* Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

*
* Minimum qualifications:

*
* + Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.

+ 2 years of experience architecting RTL solutions employing software based construction, instantiation, customization or generation of RTL.

+

Experience with industry-standard EDA tools for simulation, synthesis, and power analysis.

*
* Preferred qualifications:

*
* + Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.

+

Experience with scripting languages (i.e. Tcl, Python or Perl).

+ Experience architecting RTL solutions employing software based construction, instantiation, customization and generation of RTL.

+

Experience with SOC implementation standards and interfaces (i.e. AXI).

+

Experience with CDC, RDC, RTL Linting and LEC.

+ Understanding of digital design fundamentals, including synchronous and asynchronous logic, state machines, and bus protocols.

** About the job*
* In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of  Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will join a team working on SoC-level RTL design for  data center accelerators. You will work on top-level RTL, architecture, design and implementation of global communication busses, and integration of complex ASIC designs, as this is a highly cross-functional and central role that will require interactions with numerous ASIC development teams. You will own deliverables to the cross-functional teams (i.e. Physical Design, Verification, Validation, Firmware...)

at various project milestones. You will also be directly involved in defining and creating methodologies that enable a highly efficient design environment for all ASIC engineers.

As a Soc Design Engineer on the TPU team, you will be a key contributor to the development of Google's AI accelerators. You will leverage your expertise in digital logic design, computer architecture, and RTL coding to create innovative and efficient hardware solutions. This position offers the opportunity to address challenging technical problems at the forefront of AI hardware, working in a dynamic and collaborative environment.

The AI and Infrastructure team is redefining what's possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving channel behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $138,000-$198,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your…
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)
0
200
Filters
Education Level
Experience Level (years)
Posted in last:
Salary