ASIC​/FPGA Design Engineer III, Secret Clearance

Description

Join Our Team as a ASIC/FPGA Design Engineer where you will work on the development of a sophisticated state‑of‑the‑art avionics product in a world class Integrated Product Development environment.

• Sunnyvale CA
• Denver CO
• Highlands Ranch CO

You will be working a flexible 9x80 schedule in the office full‑time.

The Silicon Solutions team of Lockheed Martin Space is building the best ASIC/FPGA team in the world, and are seeking a highly talented and motivated ASIC & FPGA Design Engineer who has a passion for microchip design and space. You will be working at the Supplier site in Cambridge MA.

• Work with low SWaP, radiation hardened, space rated devices.
• Perform all aspects of ASIC and FPGA development through the lifecycle from initial requirements capture through architecture, design, analysis, simulations and test in a Linux‑based high‑performance computing environment.
• Support technical reviews and present to internal and external stakeholders.
• Interface with an independent verification team who will be working in parallel, verifying the design.

• You need to be an independently minded and well organized engineer, comfortable in laboratory digital environments, and able to respond and interact with a dynamic fast‑moving team.
• 3+ years professional FPGA development experience.
• Must have an active DoD Secret or higher clearance, thus you are a US Citizen.

• Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.
• Prior FPGA development experience.
• HDL programming experience with VHDL, Verilog, and/or System Verilog.
• Active DoD Secret clearance, thus US Citizenship is required.

• Masters Degree.
• Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
• FPGA/ASIC verification experience is a plus.
• Experience with electronics design.
• Experience in lab integration, and troubleshooting activities.
• Knowledge of space‑grade/qualified FPGAs and ASICs and toolsets including AMD/Xilinx Vivado or Microchip Libero.
• Experience or knowledge of MS Project, JIRA.
• Experience with Earned Value Management System (EVMS).
• Experience mentoring junior engineers.

This position requires a government security clearance, you must be a US Citizen for consideration.

Secret

The annual base salary range for this position in most major metropolitan areas in California, Massachusetts, and New York is $116,200 - $201,365. For states not referenced above, the salary range for this position will reflect the candidate’s final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.

This position is incentive plan eligible.

• Medical
• Dental
• Vision
• Life Insurance
• Short-Term Disability
• Long-Term Disability
• 401(k) match
• Flexible Spending Accounts
• EAP
• Education Assistance
• Parental Leave
• Paid time off
• Holidays

Washington state applicants only:
Non-represented full‑time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full‑time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.

Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.

• Experience Level: Experienced Professional
• Business Unit: SPACE
• Relocation Available: Possible
• Career Area: Electrical Engineering
• Type: Full-Time
• Shift: First