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Physical Design Engineer

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Cerebras
Full Time position
Listed on 2026-06-14
Job specializations:
  • Engineering
    Systems Engineer, Manufacturing Engineer
Salary/Wage Range or Industry Benchmark: 230000 - 280000 USD Yearly USD 230000.00 280000.00 YEAR
Job Description & How to Apply Below

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry‑leading training and inference speeds and empowers machine learning users to effortlessly run large‑scale ML applications, without the hassle of managing hundreds of GPUs or TPUs.

Cerebras’ current customers include top model labs, global enterprises, and cutting‑edge AI‑native startups. OpenAI recently announced a multi‑year partnership with Cerebras to deploy 750 megawatts of scale, transforming key workloads with ultra high‑speed inference.

About

The Role

As a member of our tight knit physical design team, you will be working on the design and analysis of 3D integrated products. This role involves a combination of traditional ASIC/SoC physical design skills, packaging, power, clock and cooling analysis. You will work closely with the architecture and RTL team to do R&D on novel concepts for 3D integration.

Skills and Qualifications Required
  • 10+ years of physical design/verification experience.
  • Strong knowledge of block level and full‑chip physical verification methodology.
  • Expert at optimizing for the best power/performance and area.
  • Experience with the complete physical design flow. Knowledge of Synopsys tool suite is a plus.
  • Expert with ICV or Calibre tools resolving block and full‑chip DRC and LVS issues.
  • Expert with IR/EM analysis and resolution.
  • Strong ability in scripting languages like Tcl and Python. Ability to make flow enhancements.
  • Demonstrated ability to work with RTL teams to optimize for physical design.
  • Knowledge of 2.5D or 3D packaging solutions.
  • Must have experience with 3d physical design, 3d die stacking, 3d chip design, die‑to‑die or wafer‑to‑wafer.
Preferred
  • Experience doing full chip floor planning and integration.
  • Knowledge of clock distribution.
  • Knowledge of cooling analysis.

The salary range for this position is $230,000 – $280,000 annually. Actual compensation will be determined based on factors such as experience, skills, qualifications, and location.

Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.

This website or its third‑party tools process personal data. For more details,  to review our CCPA disclosure notice.

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