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Design Verification Engineer — AI/ML SoC IP
Job in
Sunnyvale, Santa Clara County, California, 94087, USA
Listed on 2026-06-17
Listing for:
Meta Platforms, Inc.
Full Time
position Listed on 2026-06-17
Job specializations:
-
Engineering
Test Engineer, Quality Engineering
Job Description & How to Apply Below
Meta Platforms, Inc. is seeking a Design Verification Engineer to work in Sunnyvale, California. The role involves collaborating with researchers and engineers to validate core IP implementations and develop verification plans.
Candidates should have a Bachelor's degree in a relevant field and 5+ years of experience in Verilog and System Verilog verification, with proficiency in EDA tools and scripting. A commitment to continuous improvement and teamwork is essential. The role offers a competitive salary, benefits, and opportunities for professional growth.
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