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Senior SoC/ASIC Verification Architect
Job in
Sunnyvale, Santa Clara County, California, 94087, USA
Listed on 2026-06-26
Listing for:
Prodapt
Full Time
position Listed on 2026-06-26
Job specializations:
-
Engineering
Test Engineer
Job Description & How to Apply Below
Prodapt is seeking a Senior Design Verification engineer to work onsite in Sunnyvale, CA. The role involves developing verification plans, maintaining verification environments, and collaborating with design engineers to ensure high-quality deliverables.
Applicants should have 10+ years of experience in Design Verification, strong skills in Verilog/System Verilog, and proficiency in scripting languages such as Python. A Bachelor's or Master's degree in a relevant field is required.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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