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RTL Design Engineer: AI​/ML Accelerator IP & TPU

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Google Inc.
Full Time position
Listed on 2026-06-27
Job specializations:
  • Engineering
    Hardware Engineer, Systems Engineer, Electronics Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 163000 - 237000 USD Yearly USD 163000.00 237000.00 YEAR
Job Description & How to Apply Below

Google Inc. in Sunnyvale, CA is seeking an experienced engineer for an ASIC design role focused on management and control subsystem design. The successful candidate will work on System Verilog RTL for ASIC products and collaborate with architecture, validation, and hardware teams.

Applicants should have a Bachelor’s degree in Electrical Engineering or a related field and possess significant experience in ASIC design. The position offers a competitive compensation package including a bonus and equity options.

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