Manufacturing Engineer - PIC wafer fabrication

In Nokia's Network Infrastructure group the Optical Networks division seeks a Process Engineer to develop and scale PIC wafer fabrication processes for optical networking technology.

• Optimize plasma deposition, plasma etch, wet etch and clean, and related processes needed for PIC wafer fabrication.
• Work in teams to scale PIC wafer fabrication processes to larger wafer sizes, while meeting key objectives for PIC yield, uniformity, and end‑of‑line parametric performance.
• Troubleshoot wafer fabrication process problems to enable a smooth flow of production and development wafers in the fab. Support engineering process and tool owners in resolving fab process or equipment problems.
• Execute fabrication work and data collection to support process development for etch, deposition, and photolithography roadmap activities needed for future PIC technology.
• Utilize metrology equipment and test structures to maintain process control across wafer fab process modules, improve production yield and enable and guide new process development.

• JMP, DOE, SPC and their application to semiconductor manufacturing.
• Working knowledge of semiconductor fabrication processes, and expertise in etch, deposition, photolithography and related processes.
• Strong initiative, leadership and communication skills.
• Experience with semiconductor process development, sustaining, new process introduction, and ramp to volume.
• Experience supporting a 24x7 fab operations team, writing and training of fab procedures, root cause analysis and problem resolution.

B.S. degree or equivalent experience.

• Technical depth in aspects of etch, deposition, photolithography or similar tools and processes used for semiconductor manufacturing; 5 years' experience in broad aspects of semiconductor wafer fabrication.
• Knowledge of wafer fab metrology tools, for example ellipsometry, CD‑SEM, step height, and overlay metrology.
• Clear communication of problems, challenges, and initiative in deploying solutions.
• A working knowledge and fab experience from pathfinding through mature production.
• A compound semiconductor background is a plus.

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