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Validation​/Verification Eng, Sr Staff Engineer

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Synopsys, Inc.
Full Time position
Listed on 2026-07-17
Job specializations:
  • Engineering
    Test Engineer, Electronics Engineer, Quality Engineering, Systems Engineer
Salary/Wage Range or Industry Benchmark: 180000 - 260000 USD Yearly USD 180000.00 260000.00 YEAR
Job Description & How to Apply Below
Position: Validation / Verification Eng, Sr Staff Engineer- 18006

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

This role offers an opportunity to lead innovation in semiconductor product engineering while driving the development of next-generation NVM/OTP IP products.

You Are

As a Sr. Staff Product Engineer, you will lead the silicon validation of non-volatile memory/one-time programmable (NVM/OTP) intellectual property (IP) and associated blocks (analog circuits, power supplies, programming controllers, access ports/wrappers, and Built-In Self-Test (BIST) blocks). You will provide technical leadership in test plan creation, programming algorithm development, data analysis and modeling, test optimization, and failure analysis. You will collaborate closely with cross‑functional teams to complete Design Validation, Characterization, and Qualification test reports for NVM/OTP IP products.

What

You’ll Be Doing
  • Lead the silicon validation effort for NVM/OTP IP products through Design Validation, Characterization, and Qualification phases.
  • Define test coverage strategies for critical device functions and parameters, ensuring robust DC and AC characterization with optimized guard‑banding techniques.
  • Investigate and resolve complex functional and reliability issues, oversee silicon performance analysis, and drive root‑cause failure analysis projects.
  • Develop scripts to automate workflows, perform statistical analysis and data visualization, build performance and reliability models, and generate test reports.
  • Drive continuous improvements in test efficiency and quality, DOE methodology, data analysis, and cost reduction through AI, innovation and automation.
  • Collaborate with external test/reliability labs to complete test data collection and qualification (HTOL/HTSL) testing.
What You’ll Need
  • BS or MS in Electrical Engineering (preferred), Engineering Physics, Computer Science, or a related field.
  • 8+ years of hands‑on experience in semiconductor product/test engineering, with a strong background in NVM products.
  • Experience with data analysis tools such as Spotfire, Minitab or JMP.
  • Knowledge of memory fault models and advanced test methodologies for defect detection and reliability analysis.
  • Experience with semiconductor test lab equipment: memory ATE testers (Credence Kalos 2 preferred), automated handlers, oscilloscopes, waveform analyzers, and micro‑probing stations.
  • Proficiency with scripting languages such as Python or Perl, with knowledge of memory pattern algorithm development for ATE MTO/ALPG hardware.
  • Excellent communication and documentation skills, with a track record of mentoring engineers and collaborating across engineering teams.
  • Experience in optimizing test efficiency, semiconductor data analysis, and writing silicon test reports.
  • Strong analytical and problem‑solving skills, with a proactive approach to resolving silicon debug and validation challenges.
The Impact You Will Have
  • Your test plans will define how Synopsys qualifies and ships NVM and OTP IP that ends up in millions of devices, directly affecting product quality and time to market.
  • The programming algorithms and test methodologies you develop will become the foundation for how the team validates future memory IP generations.
  • Your failure analysis work will catch design issues early, saving months of respins and preventing costly field failures downstream.
  • The automation and scripting you build will free up engineering time across the validation team, letting them focus on harder problems instead of manual data wrangling.
  • Your mentorship will shape how junior engineers approach silicon debug, test coverage, and data‑driven decision making.
  • The reliability models you create will inform design tradeoffs and customer qualification requirements, giving product teams the data they need to make confident decisions.
  • Your collaboration with…
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