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Lead IC Packaging Engineer: .5D/3D & TSV Expert
Job in
Sunnyvale, Santa Clara County, California, 94087, USA
Listed on 2026-07-18
Listing for:
Avicena Inc.
Full Time
position Listed on 2026-07-18
Job specializations:
-
Engineering
Packaging Engineer
Job Description & How to Apply Below
Avicena Inc. in Sunnyvale, CA seeks a seasoned Packaging Architect to lead 2.5D/3D IC, SiP, flip chip, and wafer-level packaging efforts for next-generation interconnects.
You will own TSV reveal and C4 bumping processes, drive DOE and SPC programs, and collaborate with design, reliability, and test teams to meet performance targets. A MS/PhD with 5+ years in packaging is needed, with strong cross-functional communication skills.
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