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Senior PCB Layout Engineer
Job in
Sunnyvale, Santa Clara County, California, 94087, USA
Listed on 2026-07-23
Listing for:
Hewlett Packard Enterprise Development LP
Full Time
position Listed on 2026-07-23
Job specializations:
-
Engineering
Electronics Engineer, Hardware Engineer
Job Description & How to Apply Below
Senior PCB Layout Engineer
Senior PCB Layout Engineer responsible for designing complex, high‑speed printed circuit boards for networking equipment, servers, telecom hardware, aerospace systems, and high‑speed embedded platforms. Works onsite at an HPE office.
Key Responsibilities- Design and deliver high‑performance, multi‑layer PCBs (12–40+ layers) using Cadence Allegro PCB Designer.
- Optimize component placement for high‑speed digital, power distribution, thermal performance, and EMI control.
- Route critical interfaces (DDR4/DDR5, PCIe Gen4/Gen5+, USB 3.x/Type‑C, 10G–112G Ser Des, Ethernet) with differential pair routing, length and phase matching, and impedance control.
- Manage constraint and stack‑up with Constraint Manager and develop fabrication‑feasible stack‑ups.
- Collaborate with vendors to validate materials, via structures, and HDI capability.
- Apply signal integrity and power integrity best practices; conduct SI/PI analysis and simulation‑driven layout changes.
- Implement advanced technologies such as blind/buried vias, microvias, BGA escape, back drilling, and high‑current/low‑noise power routing.
- Generate fabrications outputs (ODB++, IPC‑2581, Gerber, drill files, drawings, stack‑up documentation) and perform DFM/DFA reviews.
- Support prototype builds, resolve manufacturing issues, and mentor junior and mid‑level PCB designers.
- Lead layout planning, design reviews, estimate schedules, and manage multiple concurrent projects.
- 8–15+ years of PCB layout experience.
- Expert proficiency in Cadence Allegro.
- Deep knowledge of high‑speed design techniques, impedance control, stack‑up planning, HDI technologies, and EMI/EMC fundamentals.
- Solid understanding of PCB fabrication and assembly processes.
- Experience with networking, server, or telecom hardware.
- Familiarity with 25G/56G/112G Ser Des, backplane design, and thermal/mechanical co‑design.
- Experience with SI/PI analysis tools.
- Comprehensive health and wellbeing benefits.
- Professional development programs tailored to career goals.
- Inclusive culture that values diverse backgrounds.
HPE is an Equal Employment Opportunity employer. We do not discriminate on the basis of race, gender, color, religion, national origin, age, disability, veteran status, or any other protected characteristic. All hiring decisions are made on the basis of qualifications, merit, and business need.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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