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Senior Physical Design Engineer: SoC RTL Optimization

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Energy Jobline ZR
Full Time position
Listed on 2026-07-23
Job specializations:
  • Engineering
    Hardware Engineer, Electronics Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 165000 USD Yearly USD 120000.00 165000.00 YEAR
Job Description & How to Apply Below

Prodapt, a leading AI-first technology partner, is hiring an experienced Physical Design Engineer to join a high-performing silicon engineering team in Sunnyvale, CA. This role offers the opportunity to work on cutting-edge ASIC/SoC designs and collaborate with talented engineers throughout the chip development lifecycle.

You will drive RTL synthesis, floor planning, timing and netlist optimization, and collaborate with RTL, verification, and physical design teams to meet demanding PPA goals.

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Position Requirements
10+ Years work experience
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