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Design Verification Lead -Gen SoC

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Hewlett Packard Enterprise
Full Time position
Listed on 2026-07-27
Job specializations:
  • Engineering
    Systems Engineer, Test Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 174000 - 352500 USD Yearly USD 174000.00 352500.00 YEAR
Job Description & How to Apply Below
Position: Design Verification Lead for Next-Gen SoC

Hewlett Packard Enterprise is seeking a visionary Design Verification Manager to lead our silicon verification team. You will architect and execute advanced verification strategies for high-performance semiconductor products, bridging architectural complexity and flawless tape-outs.

The role requires hands-on technical authority, mentorship of senior staff, and a track record of scaling verification roadmaps across block, sub-system, and full-chip environments.

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