Principal​/Sr. ASIC FPGA Design Engineer; UVM COTS

R&D project with COTS & Universal Verification Methodology (UVM) exp

• Industry: Aerospace/Avionics (Safety-Critical Flight Systems)

• Per Diem available for expenses (a 40% tax break)

Manager is looking for a SME in FPGA verification specialty with UVM experience. Must have 10+ years hands on experience to be considered.

FPGA verification specialty with UVM experience

The selected candidate will be responsible for ASIC & FPGA development on R&D program
.

This engineer with have experience in developing, testing, and integrating digital signal processing (DSP),
high speed digital design, high speed communication and system-on-chip (SOC) implemented on FPGA platforms.

Experience with COTS based control platforms and embedded processors on FPGA platforms
.

This person will help develop more affordable ways to automate and develop scripts to improve FPGA development efforts. Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts. The selected candidate will also provide support and technical direction to junior engineers.

Overall contribution to design, simulation, verification, integration & test of complex, high speed products.

Thanks,

Bob

A. Russ, MBA

Software | Systems | Cyber Security | Data Science | IoT

(DoD || Aerospace || Medical Devices)

M:

Equal Opportunity Employer/Veterans/Disabled