Post Silicon Validation

Post Silicon Validation

Validate ML-Coprocessor, display SOC, Mixed Signal SOC, and IP. Define validation strategy and test plans for new IP blocks, aligning with RTL, architecture, FW. Develop silicon validation infrastructure and coding C/C++ and Python for emulation (Zebu), FPGA (HAPS), and first silicon platforms. Identify risks and develop mitigation strategies. Execute bring-up/debug, workload enablement, and ML accelerator SW stack validation. Perform performance and power characterization under real ML workloads.

Create automated data collection flows and convert large datasets into executive summaries. Track test coverage, document bugs, drive cross-functional debug, and verify silicon fixes. Participate in design reviews and provide recommendations to strengthen validation coverage. Collaborate with factory test teams to align validation and production characterization strategies.